Full Chip STA Engineer | Bangalore,Remote| 6+ years

iSource Services June 22, 2026

All India, Remote Jobs, Work From Home, Work From Home Jobs

Clock Tree Analysis, Full Chip STA, Physical Design, PVT Corners, Signoff Methodology, SoC Design, Static Timing Analysis, Timing Closure, Timing Violation Analysis

We are Hiring: Full Chip STA Engineer in Bangalore, Remote with Exp (6+ Years)
📩 Interested? Send your updated CV/Resume to: jobs@isourcecorp.com

Key Responsibilities:
• Perform full-chip Static Timing Analysis (STA) and timing signoff.
• Analyze and resolve timing violations across complex SoC designs.
• Work closely with physical design teams for timing closure.
• Ensure design meets performance, power, and area (PPA) targets.
• Validate timing constraints and optimize design for best results.
• Support debugging of timing issues in pre- and post-layout stages.
• Work independently in a fast-paced project environment.